[{"data":1,"prerenderedAt":710},["ShallowReactive",2],{"page-/post/nezus/2026/07/nvidia-rubin-ultra-cancelled":3,"pages-grouped-only":231,"surrounding-page":705},{"id":4,"title":5,"author":6,"body":7,"date":220,"description":16,"extension":221,"group":222,"lastmod":223,"meta":224,"navigation":225,"path":226,"rawbody":227,"seo":228,"showTitle":223,"sort":223,"stem":229,"tags":223,"versions":223,"__hash__":230},"content/post/nezus/2026/07/nvidia-rubin-ultra-cancelled.md","NVIDIA Rubin Ultra取消性能腰斩","storytelling",{"type":8,"value":9,"toc":210},"minimark",[10,17,20,23,30,33,38,41,48,51,57,60,63,69,72,78,81,84,90,93,96,100,103,106,109,112,115,119,122,128,131,134,137,143,147,150,156,159,162,165,169,172,175,178,181,186,189,192,198,204],[11,12,13],"p",{},[14,15,16],"strong",{},"三个月。从登台到取消， NVIDIA 只用了三个月。",[11,18,19],{},"2026 年 3 月 16 日，圣何塞 GTC 大会。黄仁勋站在聚光灯下，身后的大屏幕上打出了那串让全场沸腾的数字：四个计算 Die ，十六颗 HBM4E 内存堆栈，单封装逼近 1TB 显存——Rubin Ultra。",[11,21,22],{},"台下掌声还没冷透。",[11,24,25,26,29],{},"三个月后， 2026 年 6 月 30 日，半导体研究机构 SemiAnalysis 确认：原版四 Die 的 Rubin Ultra ，",[14,27,28],{},"取消了","。",[11,31,32],{},"取而代之的，是一个双 Die 的\"缩水版\"。计算性能腰斩，内存带宽腰斩。那颗让 NVIDIA 在 GTC 上炫耀了半小时的旗舰芯片，从未真正存在过。",[34,35,37],"h2",{"id":36},"黄仁勋的大饼被物理学烤糊了","黄仁勋的\"大饼\"，被物理学烤糊了",[11,39,40],{},"先说说那颗被取消的 Rubin Ultra 到底有多疯狂。",[11,42,43,44,47],{},"它原本要把四颗接近光刻掩模极限尺寸的计算芯片，和十六颗 HBM4E 内存堆叠，塞进同一个封装里。整个封装的硅中介层跨度，达到了掩模极限的",[14,45,46],{},"7.5 到 8 倍","——这是台积电 CoWoS-L 先进封装技术从未挑战过的尺度。",[11,49,50],{},"翻译成人话就是： NVIDIA 想把四辆卡车并排装进一个停车位。",[11,52,53,54,29],{},"台积电的工程师们不是没试过。问题出在一个看似朴素却致命的物理现象上：",[14,55,56],{},"基板翘曲",[11,58,59],{},"四颗巨型计算芯片加上堆叠内存，全部焊在有机基板上。芯片通电发热，断电冷却，硅片和有机基板的热膨胀系数不同——于是封装开始\"翘\"。翘到一定程度，计算芯片与基板的电气接触彻底断开。",[11,61,62],{},"你花了数万美元造了一个封装，然后它自己把自己\"掰断\"了。",[11,64,65,66,29],{},"这不是良率问题，不是成本问题，是",[14,67,68],{},"物理定律不给面子",[34,70,71],{"id":71},"台积电也救不了",[11,73,74,75,29],{},"CoWoS-L 的下一代技术叫 CoPoS——用玻璃或蓝宝石基板代替硅中介层，理论上能大幅降低翘曲。但台积电给出的时间表是：",[14,76,77],{},"最早 2028 年底才能量产",[11,79,80],{},"Rubin Ultra 原计划 2027 年发货。",[11,82,83],{},"两条时间线差了整整两年。NVIDIA 没有选择，只能退回到双 Die 方案的\"保守路线\"。",[11,85,86,87,29],{},"这意味着一件比单品性能腰斩更深刻的事：",[14,88,89],{},"先进封装也撞墙了",[11,91,92],{},"过去十年，半导体行业一直在用两套逻辑续命：制程微缩不够用了，就用先进封装来凑——把更多芯片拼在一起，堆出\"等效晶体管\"。AI 投资者、云厂商、整个算力产业链，都默认这条路径是无限的。",[11,94,95],{},"现在， CoWoS-L 在四 Die 尺度上崩了。物理墙是真实存在的，而且它从不提前通知。",[34,97,99],{"id":98},"两个月后你拿到手的rubin-ultra其实是另一个东西","两个月后你拿到手的\"Rubin Ultra\"，其实是另一个东西",[11,101,102],{},"NVIDIA 没打算放弃 Rubin Ultra 这个名字。品牌还在，但里面换了一颗截然不同的\"心脏\"。",[11,104,105],{},"新版 Rubin Ultra 使用两颗计算 Die 和八颗 HBM4E 内存堆栈——规格上和标准版 Rubin 看齐，只是把内存从 HBM4 升级到了 HBM4E。每颗 GPU 大约只有 384GB 显存，而不是发布会上承诺的接近 1TB。",[11,107,108],{},"为了弥补单封装性能的下跌， NVIDIA 打算在 Kyber 机架系统上做**\"2+2\"板级配置**——把两颗双 Die 的 Rubin Ultra 装在同一块刀片上，用机架级的算力去追回封装级的损失。",[11,110,111],{},"效果如何？",[11,113,114],{},"打个比方：原本是四个人坐在一张桌子上面对面交流，延迟低、带宽高。现在变成两张桌子各坐两个人，中间要隔着走道喊话。对于推理这种延迟敏感的任务，这中间的差距，不是多塞几个 GPU 就能完全抹平的。",[34,116,118],{"id":117},"英伟达也会翻车这才是最吓人的","英伟达也会翻车——这才是最吓人的",[11,120,121],{},"说实话，如果只是 NVIDIA 产品迭代出问题，这个消息不至于让人倒吸一口凉气。",[11,123,124,125],{},"真正让人不安的是：",[14,126,127],{},"如果连 NVIDIA 都做不出来，还有谁能？",[11,129,130],{},"NVIDIA 在 AI 芯片市场的地位不需要赘述。它拥有最充足的研发预算、最优先的台积电产能、最深度的封装技术合作，以及让 AMD 和 Intel 都眼红的工程团队。",[11,132,133],{},"这样一个\"六边形战士\"，在物理定律面前，照样摔得干脆利落。",[11,135,136],{},"那么问题来了——AMD 的 Instinct MI500 计划 2027 年对标 Rubin Ultra ，它怎么绕开同一堵墙？ Google 的 TPU、Amazon 的 Trainium ，它们的自研芯片路线图里，有没有算过这道物理题？",[11,138,139,140],{},"Amir 在一条疯狂的轨道上跑得太久，久到所有人都忘了：",[14,141,142],{},"轨道本身是有尽头的。",[34,144,146],{"id":145},"hbm-市场被一起拖下水","HBM 市场被一起拖下水",[11,148,149],{},"这场取消的连带效应不止在算力端。",[11,151,152,153,29],{},"原版 Rubin Ultra 计划每颗 GPU 塞十六颗 HBM4E 内存堆栈，新版只有八颗。这意味着 SK 海力士和三星砸巨资扩建的 HBM4E 产线，面对的是一个比预期",[14,154,155],{},"砍半的订单量",[11,157,158],{},"当然，如果 NVIDIA 最终选择靠多卖 GPU 来补算力，系统级的内存需求可能重新收敛——但那是靠\"量\"堆出来的，不是靠\"价\"撑住的。对内存厂商来说，同样一颗 HBM4E 芯片，装在旗舰上的溢价和装在走量型号上，完全是两笔账。",[11,160,161],{},"就在 Rubin Ultra 取消消息传出的当天，韩国存储板块集体下挫， SK 海力士跌超 7%、三星电子跌超 6%。",[11,163,164],{},"一根链条上的每一个环节，都在感受到这堵物理墙的震动。",[34,166,168],{"id":167},"算力战争的底层逻辑正在重写","算力战争的底层逻辑，正在重写",[11,170,171],{},"Rubin Ultra 的腰斩不是一次简单的产品延期。它是一个信号。",[11,173,174],{},"AI 算力的指数级增长，过去几年被资本市场视为近乎\"不证自明\"的公理。摩尔定律慢下来了，但黄仁勋定律（ GPU 性能一年翻倍）取而代之——至少看起来是这样。",[11,176,177],{},"现在，黄仁勋定律撞上了它自己的摩尔定律时刻。",[11,179,180],{},"台积电的先进封装不是无限的，物理规律也不是可以被路线图说服的。当晶体管缩放、光刻精度、先进封装这三条路径同时逼近物理极限，整个行业必须面对一个残酷的问题：",[11,182,183],{},[14,184,185],{},"如果每年翻倍是不可持续的，那意味着什么？",[11,187,188],{},"意味着 AI 模型的 Scaling Law 可能需要被重新审视。意味着云厂商豪掷千亿美元的算力基础设施，可能不是每一分钱都能按预期回报。意味着那些把\"AI 算力永续增长\"写进估值模型的投资者，正在押注一块不知道边界在哪里的土地。",[11,190,191],{},"NVIDIA 做不出一颗芯片，这本身不重要。",[11,193,194,195],{},"重要的是，",[14,196,197],{},"物理墙的阴影，已经投在了整条跑道上。",[199,200,201],"ul",{},[202,203],"li",{},[11,205,206,209],{},[14,207,208],{},"封面高亮关键词",": Rubin Ultra, 性能腰斩, 先进封装, CoWoS-L",{"title":211,"searchDepth":212,"depth":212,"links":213},"",2,[214,215,216,217,218,219],{"id":36,"depth":212,"text":37},{"id":71,"depth":212,"text":71},{"id":98,"depth":212,"text":99},{"id":117,"depth":212,"text":118},{"id":145,"depth":212,"text":146},{"id":167,"depth":212,"text":168},"2026-07-04T00:00:00.000Z","md","#202607AI资讯",null,{},true,"/post/nezus/2026/07/nvidia-rubin-ultra-cancelled","---\ntitle: \"NVIDIA Rubin Ultra取消性能腰斩\"\ndate: 2026-07-04\ngroup: \"#202607AI资讯\"\ndescription: \"三个月。从登台到取消， NVIDIA 只用了三个月。\"\nauthor: storytelling\n---\n\n\n**三个月。从登台到取消， NVIDIA 只用了三个月。**\n\n2026 年 3 月 16 日，圣何塞 GTC 大会。黄仁勋站在聚光灯下，身后的大屏幕上打出了那串让全场沸腾的数字：四个计算 Die ，十六颗 HBM4E 内存堆栈，单封装逼近 1TB 显存——Rubin Ultra。\n\n台下掌声还没冷透。\n\n三个月后， 2026 年 6 月 30 日，半导体研究机构 SemiAnalysis 确认：原版四 Die 的 Rubin Ultra ，**取消了**。\n\n取而代之的，是一个双 Die 的\"缩水版\"。计算性能腰斩，内存带宽腰斩。那颗让 NVIDIA 在 GTC 上炫耀了半小时的旗舰芯片，从未真正存在过。\n\n## 黄仁勋的\"大饼\"，被物理学烤糊了\n\n先说说那颗被取消的 Rubin Ultra 到底有多疯狂。\n\n它原本要把四颗接近光刻掩模极限尺寸的计算芯片，和十六颗 HBM4E 内存堆叠，塞进同一个封装里。整个封装的硅中介层跨度，达到了掩模极限的**7.5 到 8 倍**——这是台积电 CoWoS-L 先进封装技术从未挑战过的尺度。\n\n翻译成人话就是： NVIDIA 想把四辆卡车并排装进一个停车位。\n\n台积电的工程师们不是没试过。问题出在一个看似朴素却致命的物理现象上：**基板翘曲**。\n\n四颗巨型计算芯片加上堆叠内存，全部焊在有机基板上。芯片通电发热，断电冷却，硅片和有机基板的热膨胀系数不同——于是封装开始\"翘\"。翘到一定程度，计算芯片与基板的电气接触彻底断开。\n\n你花了数万美元造了一个封装，然后它自己把自己\"掰断\"了。\n\n这不是良率问题，不是成本问题，是**物理定律不给面子**。\n\n## 台积电也救不了\n\nCoWoS-L 的下一代技术叫 CoPoS——用玻璃或蓝宝石基板代替硅中介层，理论上能大幅降低翘曲。但台积电给出的时间表是：**最早 2028 年底才能量产**。\n\nRubin Ultra 原计划 2027 年发货。\n\n两条时间线差了整整两年。NVIDIA 没有选择，只能退回到双 Die 方案的\"保守路线\"。\n\n这意味着一件比单品性能腰斩更深刻的事：**先进封装也撞墙了**。\n\n过去十年，半导体行业一直在用两套逻辑续命：制程微缩不够用了，就用先进封装来凑——把更多芯片拼在一起，堆出\"等效晶体管\"。AI 投资者、云厂商、整个算力产业链，都默认这条路径是无限的。\n\n现在， CoWoS-L 在四 Die 尺度上崩了。物理墙是真实存在的，而且它从不提前通知。\n\n## 两个月后你拿到手的\"Rubin Ultra\"，其实是另一个东西\n\nNVIDIA 没打算放弃 Rubin Ultra 这个名字。品牌还在，但里面换了一颗截然不同的\"心脏\"。\n\n新版 Rubin Ultra 使用两颗计算 Die 和八颗 HBM4E 内存堆栈——规格上和标准版 Rubin 看齐，只是把内存从 HBM4 升级到了 HBM4E。每颗 GPU 大约只有 384GB 显存，而不是发布会上承诺的接近 1TB。\n\n为了弥补单封装性能的下跌， NVIDIA 打算在 Kyber 机架系统上做**\"2+2\"板级配置**——把两颗双 Die 的 Rubin Ultra 装在同一块刀片上，用机架级的算力去追回封装级的损失。\n\n效果如何？\n\n打个比方：原本是四个人坐在一张桌子上面对面交流，延迟低、带宽高。现在变成两张桌子各坐两个人，中间要隔着走道喊话。对于推理这种延迟敏感的任务，这中间的差距，不是多塞几个 GPU 就能完全抹平的。\n\n## 英伟达也会翻车——这才是最吓人的\n\n说实话，如果只是 NVIDIA 产品迭代出问题，这个消息不至于让人倒吸一口凉气。\n\n真正让人不安的是：**如果连 NVIDIA 都做不出来，还有谁能？**\n\nNVIDIA 在 AI 芯片市场的地位不需要赘述。它拥有最充足的研发预算、最优先的台积电产能、最深度的封装技术合作，以及让 AMD 和 Intel 都眼红的工程团队。\n\n这样一个\"六边形战士\"，在物理定律面前，照样摔得干脆利落。\n\n那么问题来了——AMD 的 Instinct MI500 计划 2027 年对标 Rubin Ultra ，它怎么绕开同一堵墙？ Google 的 TPU、Amazon 的 Trainium ，它们的自研芯片路线图里，有没有算过这道物理题？\n\nAmir 在一条疯狂的轨道上跑得太久，久到所有人都忘了：**轨道本身是有尽头的。**\n\n## HBM 市场被一起拖下水\n\n这场取消的连带效应不止在算力端。\n\n原版 Rubin Ultra 计划每颗 GPU 塞十六颗 HBM4E 内存堆栈，新版只有八颗。这意味着 SK 海力士和三星砸巨资扩建的 HBM4E 产线，面对的是一个比预期**砍半的订单量**。\n\n当然，如果 NVIDIA 最终选择靠多卖 GPU 来补算力，系统级的内存需求可能重新收敛——但那是靠\"量\"堆出来的，不是靠\"价\"撑住的。对内存厂商来说，同样一颗 HBM4E 芯片，装在旗舰上的溢价和装在走量型号上，完全是两笔账。\n\n就在 Rubin Ultra 取消消息传出的当天，韩国存储板块集体下挫， SK 海力士跌超 7%、三星电子跌超 6%。\n\n一根链条上的每一个环节，都在感受到这堵物理墙的震动。\n\n## 算力战争的底层逻辑，正在重写\n\nRubin Ultra 的腰斩不是一次简单的产品延期。它是一个信号。\n\nAI 算力的指数级增长，过去几年被资本市场视为近乎\"不证自明\"的公理。摩尔定律慢下来了，但黄仁勋定律（ GPU 性能一年翻倍）取而代之——至少看起来是这样。\n\n现在，黄仁勋定律撞上了它自己的摩尔定律时刻。\n\n台积电的先进封装不是无限的，物理规律也不是可以被路线图说服的。当晶体管缩放、光刻精度、先进封装这三条路径同时逼近物理极限，整个行业必须面对一个残酷的问题：\n\n**如果每年翻倍是不可持续的，那意味着什么？**\n\n意味着 AI 模型的 Scaling Law 可能需要被重新审视。意味着云厂商豪掷千亿美元的算力基础设施，可能不是每一分钱都能按预期回报。意味着那些把\"AI 算力永续增长\"写进估值模型的投资者，正在押注一块不知道边界在哪里的土地。\n\nNVIDIA 做不出一颗芯片，这本身不重要。\n\n重要的是，**物理墙的阴影，已经投在了整条跑道上。**\n\n-\n\n**封面高亮关键词**: Rubin Ultra, 性能腰斩, 先进封装, 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